Gesellschaft fr Informatik e.V.

Lecture Notes in Informatics


INFORMATIK 2006, Informatik für Menschen, Band 1, Beiträge der 36. Jahrestagung der Gesellschaft für Informatik e.V. (GI), 2. - 6. Oktober 2006 in Dresden P-93, 177-184 (2006).


2006


Editors

Christian Hochberger, Rüdiger Liskowsky (eds.)


Contents

An architecture for runtime evaluation of soc reliability

Andreas Bernauer , Oliver Bringmann , Wolfgang Rosenstiel , Abdelmajid Bouajila , Walter Stechele and Andreas Herkersdorf

Abstract


This paper presents an architecture to evaluate the reliability of a systemon-chip (SoC) during its runtime that also accounts for the system's redundancy. We propose to integrate an autonomic layer into the SoC to detect the chip's current condition and instruct appropriate countermeasures. In the autonomic layer, error counters are used to count the number of errors within a fixed time interval. The counters' values accumulate into a global register representing the system's reliability. The accumulation takes into account the series and parallel composition of the system.


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ISBN 978-3-88579-187-4


Last changed 24.01.2012 21:55:42